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Article #1618

Re: RISC is NOT micro-code

#1618
From: Brian bcase Case
Date: Thu, 20 Jul 1989 17:30
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>>Correct me if I'm wrong, but I remember looking at some of the initial
>>specs for the Intel 860 and that thing looked like a nightmare to write
>>a compiler for.  Forget about optimizations, just getting floating
>>point results out of the FP pipeline, requires that the compiler have
>>knowledge of the internals of the hardware.
>
>This is true,

This is not true; the i860 has non-pipelined FP instructions that
don't require any knowledge of the pipeline.  Of course, if you
use them, you don't get the performance....
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References: <753@bnr-fos.UUCP> <1989Jul17.035238.6497@utzoo.uucp> <756@bnr-fos.UUCP> <2203@taux01.UUCP> <42942@bbn.COM>

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From: bcase@cup.portal.com (Brian bcase Case)
Newsgroups: comp.arch
Subject: Re: RISC is NOT micro-code
Message-ID: <20629@cup.portal.com>
Date: 20 Jul 89 17:30:42 GMT
References: <753@bnr-fos.UUCP> <1989Jul17.035238.6497@utzoo.uucp>  <756@bnr-fos.UUCP> <2203@taux01.UUCP> <42942@bbn.COM>
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