Article View: comp.arch
Article #1627Re: What is a Mainframe?
From: John G Dobnick
Date: Sat, 22 Jul 1989 01:33
Date: Sat, 22 Jul 1989 01:33
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From article <10205@boulder.Colorado.EDU>, by panos@tigger.colorado.edu (Panos Tsirigotis):
>
> Something else now:
> In the discussion about the PDP-20 I noticed several similarities in the
> PDP-20 architecture and the one of the Univac/Sperry/UniSys 1100 series
> (36 bit instructions, indirection bit, execute instruction, subroutine
> call etc.)
> Is that a coincidence ?
And then compare these to the IBM 7090/7094 -- 36 bit words, one's complement,
, load/store instruction set, etc. etc. (Was the Dec-20 one's complement?)
Is that a coincidence?
In the 1100's case, the answer is apparently "No!". The early 1100 series
machines [1107, 1108 and "friends" {1106, 1100/10, 1100/20}, 1110, 1100/40]
had this Processor State Register (PSR) bit labelled "7090 Floating Point
Compatibility Mode".
--
John G Dobnick
Computing Services Division @ University of Wisconsin - Milwaukee
INTERNET: jgd@csd4.milw.wisc.edu
UUCP: <backbone>!uwvax!uwmcsd1!jgd
"Knowing how things work is the basis for appreciation,
and is thus a source of civilized delight." -- William Safire
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!gatech!cwjcc!mailrus!csd4.milw.wisc.edu!jgd@csd4.milw.wisc.edu From: jgd@csd4.milw.wisc.edu (John G Dobnick) Newsgroups: comp.arch Subject: Re: What is a Mainframe? Message-ID: <3469@csd4.milw.wisc.edu> Date: 22 Jul 89 01:33:01 GMT References: <10205@boulder.Colorado.EDU> Sender: news@csd4.milw.wisc.edu Reply-To: jgd@csd4.milw.wisc.edu Distribution: usa Lines: 26