🚀 go-pugleaf

From article <3301@alliant.Alliant.COM>, by werme@Alliant.COM (Ric Werme):
> In article <43445@bbn.COM> slackey@BBN.COM (Stan Lackey) writes:
>>The TI 990/9900 did this - the CPU had a 'workspace pointer' which
>>pointed to R0, the base of the register file, hopefully in a section
>>of main memory that was implemented in Schottky RAM.
>>
>>Now would 40,000 other readers mind adding more architectures to the
>>list?  Preferably really old ones.  :-)

	Funny you should ask :-)

> Special purpose register architectures like the Z80 (or [gack] 6502) are a
> pain to extend.

	If one considers the 256 locations that constitute "zero-page" on
the 6502 to _be_ its registers:

a) It qualifies for the question above.
b) it is very regular
c) The "x" register can now serve to reference a (albeit bounded) register
   "stack"
d) one will produce quite good code with substantially less pain than before
   this leap of intution.

Seriously, the 6502 is a bit quirky, but many processors (incl the 6502) get
a whole lot easier to program once one "gets" certain keys to their intended
use.

>  Even the 68000's dichotomy between the address and data
> registers causes problems.

	No kidding :-(

> Of course (how can I let it slip by?), the PDP-10 is a general purpose register
> machine.  I could write an instruction on it and feel as though I had
> accomplished something.  Writing "mov d0,a0" makes me wish I had a PDP-11!

	Especially since mov d0,a0 is almost never what you mean :-(
(explanation, most assemblers default a move with no size spec to be "word"
aka 16 bits, but move to an A register sign-extends. Gotcha :-(  )

					Mike

(we use a _lot_ of 6502s and 68010s here, but then a lot of our customers
are cheapskates :-)

| Mike Albaugh (albaugh@dms.UUCP || {...decwrl!turtlevax!}weitek!dms!albaugh)
| Atari Games Corp (Arcade Games, no relation to the makers of the ST)
| 675 Sycamore Dr. Milpitas, CA 95035		voice: (408)434-1709
| The opinions expressed are my own (Boy, are they ever)