Article View: comp.arch
Article #20629Re: Query about miserable M68882 performance [really 80-bit notes]
From: John Mashey
Date: Tue, 04 Apr 1989 04:16
Date: Tue, 04 Apr 1989 04:16
16 lines
1277 bytes
1277 bytes
In article <7829@pyr.gatech.EDU> mccalpin@loligo.cc.fsu.edu (John McCalpin) writes:
...
>On the bright side, both the Intel and Motorola chips make it easy
>to implement a robust IEEE-compliant floating-point system, since just
>about everything is done by the hardware. If the compiler is smart about
>keeping intermediate results on the co-processor's internal stack, then
>the extra accuracy can be helpful....
Just out of curiosity, can people out there in netland say:
1) Which software systems do this [keep intermediate results this way]?
2) How well it works?
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com
DDD: 408-991-0253 or 408-720-1700, x253
USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
Technical Details
Message-ID:
<16543@winchester.mips.COM>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!vsi1!wyse!mips!mashReferences:
<2583@tank.uchicago.edu> <7829@pyr.gatech.EDU>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!vsi1!wyse!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Query about miserable M68882 performance [really 80-bit notes] Message-ID: <16543@winchester.mips.COM> Date: 4 Apr 89 04:16:22 GMT References: <2583@tank.uchicago.edu> <7829@pyr.gatech.EDU> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 16