Article View: comp.arch
Article #20898Re: Criteria for comparing RISC processors
From: John Mashey
Date: Tue, 25 Apr 1989 21:39
Date: Tue, 25 Apr 1989 21:39
49 lines
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2667 bytes
In article <141@dg.dg.com> rec@dg.UUCP (Robert Cousins) writes:
....
>> Mature code generators.
...
>>
>....can take a long time to develop. The best example I know of is with
>compilers. Some RISC processors (such as MIPS) have extensively tuned
>compilers behind them. These compilers are extremely complex and designed
>to squeeze every bit of speed from them.
>However, other RISC processors (such as the 88000) with less complex
>compilers still beat the pants off of them. Therefore, it isn't the
---------------------------------------^^^^
>maturity of the code generator, it is the delivered bang/$.
The "them" was a little ambiguous: I assume it meant "CISC chips", not R3000s
(as 3000s were the last "them" mentioned.)
Note that "maturity" of code generators (and compiler technology) in
general, is unfortunately even less well-defined than mips&mflops,
and it's a lot more than generating good code.
I once took a stab at a few verifiable metrics for compiler system
"maturity". Here are a few quick samples:
- can you mix and match different languages, like C, FORTRAN, Pascal?
- can you source-debug them, too?
- can you do the same with COBOL, PL/1, or ADA and the others?
(much harder; here's where linkage conventions and/or
symbol tables break)
- compilation speeds
- robust in face of huge programs?
- can you compile and link (for example) a 1-2-million-line program
that generates a single executable of 32MB of CODE?
- can you debug it?
- can you compile/link/debug a program that has a 1000 different
include files?
Hmmm. here's an interesting question for the net: how about offering examples
of LARGE programs, either in:
# of files
# of lines of source
# of bytes of code generated
what machine & OS & language does this run on?
what does it do?
We've seen some real monsters land on our machines; maybe other people
have good examples also.
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com
DDD: 408-991-0253 or 408-720-1700, x253
USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!apple!versatc!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Criteria for comparing RISC processors Message-ID: <18120@winchester.mips.COM> Date: 25 Apr 89 21:39:25 GMT References: <2368@ogccse.ogc.edu> <1464@cfa.cfa.harvard.EDU> <141@dg.dg.com> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 49