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Article #21319

Re: Dynamic frequency analysis (was Register usage)

#21319
From: jean-david.beyer
Date: Wed, 17 May 1989 13:39
36 lines
2232 bytes
In article <15767@vail.ICO.ISC.COM>, rcd@ico.ISC.COM (Dick Dunn) writes:
> In article <952@aber-cs.UUCP>, pcg@aber-cs.UUCP (Piercarlo Grandi) writes:
> [much deleted]

> > support for my position on "register" (where a competent programmer is
> > expected to do this, with great simplication of the compiler, because
> > compilers cannot possibly know which variables are the most frequently used
> > dynamically).
> 
> Where did this idea come from, and what can we do to send it back???
> All it takes for the compiler to allocate based on dynamic frequency is
> the right information from an execution profile.  (Q to MIPS folk--don't
> you have tools for this right now?)  In practice it may be tedious to
> develop a compiler system to do this, but the principle is simple:  Compile
> the program once with lots of instrumentation to gather frequency-of-use

One of our optimizers allocates registers by estimating useage. To handle
loops, it assums each loop is executed a small number of times. This does
much better register allocation than I do manually. It does not use profile
data. 

I once modified the optimizer to use the true count, when it could be
determined (many loops are done a constant number of times that can
be determined at optimization time, especially in benchmarks :-)   )
This did not improve the execution time of any of the benchmarks tested,
beyond what assuming they were executed a small number of times.

I thought about using execution-time profiles to improve optimization,
but that just opened up the can of  worms of determining what "typical data"
to use for the profiling run. At least, MIPS do this.

-- 
Jean-David Beyer
AT&T Bell Laboratories
Holmdel, New Jersey, 07733
attunix!beyer
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Message-ID: <664@cbnewsh.ATT.COM>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!att!cbnewsh!beyer
References: <952@aber-cs.UUCP> <15767@vail.ICO.ISC.COM>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!att!cbnewsh!beyer
From: beyer@cbnewsh.ATT.COM (jean-david.beyer)
Newsgroups: comp.arch
Subject: Re: Dynamic frequency analysis (was Register usage)
Summary: Our  optimizer allocates registers better than I  do.
Message-ID: <664@cbnewsh.ATT.COM>
Date: 17 May 89 13:39:24 GMT
References: <952@aber-cs.UUCP> <15767@vail.ICO.ISC.COM>
Distribution: eunet,world
Organization: AT&T Bell Laboratories
Lines: 36