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Article #21836Re: Integer Multiply/Divide on Sparc
From: Michael Hui
Date: Wed, 27 Dec 1989 18:08
Date: Wed, 27 Dec 1989 18:08
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For a frame of reference, T.I.'s DSP chip TMS320C25 does a 16x16 multiply in a single cycle. AMD's Am29000 uses multiple instructions to accomplish a general 32x32 multiply. I say general because, quoating from 7.1.6 of the User's Manual (c)1987: "It may be beneficial to precede a full multiply procedure with a routine to discover whether or not the number of multiply steps may be reduced." In other words, the compiler is given more room for optimization here when faced with two arguments of different precision. Michael Hui 604-985-4214 hui@joplin.mpr.ca
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uunet!zephyr.ens.tek.com!uw-beaver!ubc-cs!eric!joplin!hui From: hui@joplin.mpr.ca (Michael Hui) Newsgroups: comp.arch Subject: Re: Integer Multiply/Divide on Sparc Message-ID: <1979@eric.mpr.ca> Date: 27 Dec 89 18:08:07 GMT References: <84768@linus.UUCP> <8840004@hpfcso.HP.COM> <1804@l.cc.purdue.edu> Sender: news@eric.mpr.ca Reply-To: hui@joplin.mpr.ca Organization: Microtel Pacific Research Ltd., Burnaby, B.C., Canada Lines: 15