🚀 go-pugleaf

In article <34000@mips.mips.COM> cprice@mips.COM (Charlie Price) writes:
:> In article <84983@linus.UUCP> bs@linus.UUCP (Robert D. Silverman) writes:
:> >In article <8840004@hpfcso.HP.COM> dgr@hpfcso.HP.COM (Dave Roberts) writes:
:> > 
:> >Huh? The MIPS-R3000 does integer multiplies in hardware in just a
:> >couple of cycles. The SPARC takes a minimum of 47 cycles using
:> >its so-called multiply-step function to multiply two integers.
:> >Division is even worse by almost an order of magnitude.
:
:The MIPS R2000, R3000, and R6000 do indeed have multiply and divide,
:but your idea of the time they take is not quite right.
:
:proc	mult	div	(times in cycles to put result in special regs)
:R2000	12	35
:R3000	12	35
:
 
The MIPS takes 4 times fewer cycles to do a multiply than the SPARC.
It also yields a 64 bit product.

Division takes 6 times fewer cycles AND ALSO gives the remainder
[this is a big plus]. A 64 bit by 32 bit divide on the SPARC can take
500-600 cycles in the worst case. The SUN-3 does a 32x32 multiply in 41
cycles and a 64 by 32 bit divide [with remainder] in 76. 

The MIPS only does a 32 by 32 bit divide. 64 bit by 32 bit takes extra
coding.


:I don't believe that the R6000 numbers are yet public,
:but I'm willing to say that they aren't better,
:in cycle counts, than the R3000.
:
:The operations work the following way:
:
Yes, I have a MIPS architecture book. I have benchmarked some multiple
precision integer arithmetic code on an R-2000 and on a SUN-4/280.
The R2000 system [a DECstation] was 2x faster.
Note that this wasn't even the R3000. The time difference is mostly
due to integer multiply/divides.

 
-- 
Bob Silverman
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Internet: bs@linus.mitre.org; UUCP: {decvax,philabs}!linus!bs
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