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Article #22013

Re: PUSH on i8088/i80x86

#22013
From: rob
Date: Tue, 09 Jan 1990 18:34
28 lines
1631 bytes
dricejb@drilex.UUCP writes:

>In article <182DAVISTD@MSU> DAVISTD@MSU.BITNET (Tom Davis) writes:
><In debugging some vendor code (:-) I came across what appears to be a subtle
><difference between the i8088 and i80x86...
><On the i8088, a "PUSH SP" decrements SP before pushing it onto the stack. On
><the i80x86, SP is pushed onto the stack before it is decremented (somehow).
><Therefore, on the i8088 the following code does not work as expected:
><
><  PUSH SP
><  POP  SP
><
><(SP ends up "off by two bytes".)

>The behavior of "PUSH SP" was one of the documented differences between the
>808[68] and its succcessors... this should be documented in an 80186 or
>80286 manual.

   For what it's worth, I think the 286 was the first one to push SP
before decrementing it. The 8088/6 and 80188/6 decrement SP, then push
it.

   Only Intel knows for sure, but it's a guess that, aside from making the 
PUSH SP / POP SP pair behave more logically, the newer method allows the
CPU to detect a stack overrun before SP gets changed. The difference is
fairly clearly documented, though. One of Intel's 'compatibility rules'
is something like 'Don't rely on the value put on the stack by PUSH SP'.
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Message-ID: <208300005@prism>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!purdue!bu.edu!bu-cs!mirror!prism!rob
References: <1261570140@<182DAVISTD@MSU>>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!purdue!bu.edu!bu-cs!mirror!prism!rob
From: rob@prism.TMC.COM
Newsgroups: comp.arch
Subject: Re: PUSH on i8088/i80x86
Message-ID: <208300005@prism>
Date: 9 Jan 90 18:34:00 GMT
References: <1261570140@<182DAVISTD@MSU>>
Lines: 28
Nf-ID: #R:<182DAVISTD@MSU>:1261570140:prism:208300005:000:1193
Nf-From: prism.TMC.COM!rob    Jan  9 13:34:00 1990