🚀 go-pugleaf

>>>Having a microcoded unaligned data capability is faster than
>>>user-level instructions doing the same thing.
>>
>>Microcoded unaligned data takes two cycles to load an unaligned datum.
>>(Assuming the unaligned datum overlaps two data bus widths.)  MIPSco
>>style load-left and load-right take two cycles to load the same
>>unaligned datum.
>
>I was thinking of bus-wide words (i.e., typically 32-bits).
>You have at least:
>     BUS FETCH / SHIFT ALIGN / BUS FETCH / SHIFT ALIGN / OR / STORE
>Implementing these at typical user level adds even more -- tests to
>figure out how much to shift etc.

LWL/LWR seem to work this way (and the MIPSco folk will correct me, I'm sure):
    BUS FETCH / SHIFT ALIGN / STORE selected bytes - LWL
    BUS FETCH / SHIFT ALIGN / STORE selected bytes - LWR
Two instructions. Cycles depending on mermory.

--
Andy Glew, aglew@uiuc.edu