Article View: comp.arch
Article #2738Re: Alliant/Intel PAX parallel computing standard
From: Eugene Brooks
Date: Sat, 21 Oct 1989 04:12
Date: Sat, 21 Oct 1989 04:12
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In article <23184@cup.portal.com> mslater@cup.portal.com (Michael Z Slater) writes: >Is anyone familiar with Alliant's loop-level parallelism scheme? >Intel is pitching this as a major win for the i860, in that it gives them >a binary standard for parallel computing, something no other processor has. >Does anyone think this is really significant? It may be a major "business win" for Intel, but the leading edge parallel code writers using the Alliant are NOT using their loop-level parallelism scheme. It does not support nested concurrency and routine level concurrency. You have to do that to be on the leading edge in parallel code performance. The techies won't care about this "pact" but the stock brokers might. brooks@maddog.llnl.gov, brooks@maddog.uucp
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arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!gem.mps.ohio-state.edu!apple!sun-barr!lll-winken!vette!brooksReferences:
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!gem.mps.ohio-state.edu!apple!sun-barr!lll-winken!vette!brooks From: brooks@vette.llnl.gov (Eugene Brooks) Newsgroups: comp.arch Subject: Re: Alliant/Intel PAX parallel computing standard Message-ID: <36425@lll-winken.LLNL.GOV> Date: 21 Oct 89 04:12:57 GMT References: <23184@cup.portal.com> Sender: usenet@lll-winken.LLNL.GOV Reply-To: brooks@maddog.llnl.gov (Eugene Brooks) Organization: Lawrence Livermore National Laboratory Lines: 13