🚀 go-pugleaf

There is another well known solution to the problem of dual-porting a
cache between a shared bus and a pe (processor).  The idea is to use
some sort of filter to keep bus transactions which do not affect the
cache from reaching the cache.  This solution is cheaper than building
two identical caches and is equally effective.

Build a conventional cache augmented with an extra copy of tag-store,
which will be used as a filter.  This is updated every time the real
one is.  Clearly, in the absence of cache-misses, the extra tag store
is never updated.  Bus transactions are looked up in this extra
tag-store without disturbing the real cache if the address does not
not match.  If they do, then the real cache entry is updated or
invalidated (similarly changing the tar-store copy).
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				Eric Freudenthal
				NYU Ultracompter Lab
				715 Broadway, 10th floor
				New York, NY  10012
				
				Phone:(212) 998-3345 work
				      (718) 789-4486 home
				Email:freudent@ultra.nyu.edu