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Article #3043Re: RISC vs CISC (rational discussion, not religious wars)
From: Alex Colvin
Date: Thu, 16 Nov 1989 23:28
Date: Thu, 16 Nov 1989 23:28
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In article <36564@apple.Apple.COM>, baum@Apple.COM (Allen J. Baum) writes: > Not so novel; this scheme was used in the Denelcor HEP, and by Stellar in > their new machine. The Stellar had some kind of semphore feature so that the > parallel running tasks could communicate with each other. The HEP had a > semophore bit/memory location! wasn't this called a barrel processor? I believe this was discussed here a year or two ago.
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arc1-ca.pugleaf.net!utzoo!utgpu!watmath!att!rutgers!ucsd!swrinde!gem.mps.ohio-state.edu!samsung!xanth!mcnc!uvaarpa!ra!macReferences:
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!watmath!att!rutgers!ucsd!swrinde!gem.mps.ohio-state.edu!samsung!xanth!mcnc!uvaarpa!ra!mac From: mac@ra.cs.Virginia.EDU (Alex Colvin) Newsgroups: comp.arch Subject: Re: RISC vs CISC (rational discussion, not religious wars) Summary: barrel? Message-ID: <650@ra.cs.Virginia.EDU> Date: 16 Nov 89 23:28:08 GMT References: <TOMS.89Nov15114003@omews44.intel.com> <503@ctycal.UUCP> <36564@apple.Apple.COM> Organization: University of Virginia Lines: 8