Article View: comp.arch
Article #7994Re: DEC Alpha AXP System Performance
From: Wayne Schlitt
Date: Thu, 12 Nov 1992 20:39
Date: Thu, 12 Nov 1992 20:39
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1176 bytes
In article <BxL3IH.KtH.2@cs.cmu.edu> lindsay+@cs.cmu.edu (Donald Lindsay) writes: > > What he may have meant, is that HP won't be able to use offchip > primary cache much longer. That was difficult at 66 MHz, and is > really impressive at 100 MHz. Even HP can't do it at 200 MHz, surely. > yes, but at 66Mhz, and 100Mhz, the technique has been real effective. By the time they get to 200Mhz, there will be enough chip real estate to put reasonable 1st level caches on chip. The technique should be just as effective at making the 2nd level cache faster, so I don't think HP is wasting effort in the long run either. -wayne
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Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!dsndata!backbone!backbone!wayne From: wayne@backbone.uucp (Wayne Schlitt) Subject: Re: DEC Alpha AXP System Performance In-Reply-To: lindsay+@cs.cmu.edu's message of 12 Nov 92 03: 39:52 GMT Message-ID: <WAYNE.92Nov12143900@backbone.uucp> Sender: wayne@backbone (Wayne Schlitt) Organization: The Backbone Cabal References: <1992Nov10.153629.27510@ryn.mro4.dec.com> <BxIM38.L9F.2@cs.cmu.edu> <15445@auspex-gw.auspex.com> <BxL3IH.KtH.2@cs.cmu.edu> Date: Thu, 12 Nov 1992 20:39:00 GMT