A-law and u-law companding

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Article #1536

#1536

From: Mark Summerfield - Switching
Date: Fri, 08 Mar 1991 05:21

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I am currently investigating implementation of A-law and u-law (that's
mu-law :-) companding techniques. I am aware of the formulae which are
used to generate these, however I am more interested in practical fast
software and digital hardware implementations, in which the calculation
of logarithms is impractical. In addition to my own literature search
on the subject, I was wondering if anyone out there can point me in the 
direction of any examples of previous work in this area. I would be
particularly interested in any examples of custom (VLSI) implementations.

Thanks in advance for any help,

Mark.
------------------------------------------------+-----------------------------+
Mark Summerfield, Telecom Research Laboratories | "A witty saying proves      |
ACSnet[AARN/Internet]: m.summerfield@trl.oz[.au]|       nothing." -- Voltaire |
Snail: PO Box 249, Clayton, Vic., 3168          +-----------------------------+

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Path: arc1-ca.pugleaf.net!utzoo!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!elroy.jpl.nasa.gov!sdd.hp.com!spool.mu.edu!munnari.oz.au!bruce!trlluna!sandinista!brahma!summer
From: summer@brahma.trl.oz.au (Mark Summerfield - Switching)
Newsgroups: comp.dsp
Subject: A-law and u-law companding
Message-ID: <1991Mar8.052136.11121@trl.oz.au>
Date: 8 Mar 91 05:21:36 GMT
Sender: news@trl.oz.au (USENET News System)
Reply-To: m.summerfield@trl.oz.au
Organization: Telecom Research Laboratories, Melbourne, Australia
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