Thread View: comp.dsp
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Started by Gary D. Shiflett
Tue, 28 May 1991 16:46
State-of-the-Art ADCs?
Author: Gary D. Shiflett
Date: Tue, 28 May 1991 16:46
Date: Tue, 28 May 1991 16:46
26 lines
1374 bytes
1374 bytes
I am working on a project to determine the feasibility
of developing an ultra-high speed FFT digital signal
processor. The notional requirements for the A/D converter
subsystem are 360 million complex samples per second (or
720 real MSPS) at 7 effective bits. My questions are:
1) What is considered state-of-the-art in ADCs?
2) Who are the players?
3) Which is the preferred sampling architecture, e.g.,
direct, analog or digital quadrature, analog or
digital Hilbert, at these rates and why (general)?
4) Does anyone know of any POCs for ADC work in the
Advanced Circuits Technology Group at Hughes (El
Segundo)?
Thanks in advance,
--
Gary Shiflett
Applied Physics Laboratory
Johns Hopkins University
shif@aplpy.jhuapl.edu
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