Article View: comp.lang.asm.x86
Article #32Re: Using burst mode on PCI bus
From: Michael Richmann
Date: Fri, 12 Apr 1996 18:31
Date: Fri, 12 Apr 1996 18:31
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1759 bytes
manu@mail.imaginet.fr (Manu) wrote: >Michael Richmann <richmann@cmt.anl.gov> wrote: > >>scitron@mail.global.co.za (user) wrote: >>>We are in the process developing our first PCI bus add-on card. >>>Here are some questions regarding the software interface : >>> >>>1. Is burst mode data transfer implemented on most motherboards, for >>> example Triton chipset, etc ? > >>It is on the Intel Endeavor board (Triton chipset) w/burst cache >>installed. > >>> >>>2. If this is implemented, how does the software interface address it? >>> As far as I know, no x486 instruction can set up a burst mode >>> transfer. Is there perhaps a special Pentium instruction that can >>> accomplish this ? > >>Don't rightly know. Turning the burst mode on/off on the Endeavor is >>accomplished through the bios settings. > > Also on the 2 pentiums board I have (60 and 100). > I may be wrong but isn't it a 'hardware' selection for the pci burst >mode ? > Well, "hardware" settings can be accomplished through either bios or jumper settings, depending on the manufacturer's preference for doing things. -- Mike My opinions, not Argonne's...
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Path: arc1-ca.pugleaf.net!milo.mcs.anl.gov!usenet From: Michael Richmann <richmann@cmt.anl.gov> Newsgroups: comp.lang.asm.x86,comp.lang.c,comp.lang.c++,comp.sys.intel Subject: Re: Using burst mode on PCI bus Date: 12 Apr 1996 18:31:30 GMT Organization: CMT.ANL.GOV Message-ID: <4km7i2$271@milo.mcs.anl.gov> References: <4kh37m$fmd@dodo.global.co.za> <4kh51i$p79@milo.mcs.anl.gov> <4kk91h$iuo@avalon.imaginet.fr> NNTP-Posting-Host: cmtq30.cmt.anl.gov Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 1.1N (Windows; I; 16bit)