Article View: comp.lang.asm.x86
Article #31Re: Using burst mode on PCI bus
From: Manu
Date: Fri, 12 Apr 1996 00:47
Date: Fri, 12 Apr 1996 00:47
24 lines
1359 bytes
1359 bytes
Michael Richmann <richmann@cmt.anl.gov> wrote: >scitron@mail.global.co.za (user) wrote: >>We are in the process developing our first PCI bus add-on card. >>Here are some questions regarding the software interface : >> >>1. Is burst mode data transfer implemented on most motherboards, for >> example Triton chipset, etc ? >It is on the Intel Endeavor board (Triton chipset) w/burst cache >installed. >> >>2. If this is implemented, how does the software interface address it? >> As far as I know, no x486 instruction can set up a burst mode >> transfer. Is there perhaps a special Pentium instruction that can >> accomplish this ? >Don't rightly know. Turning the burst mode on/off on the Endeavor is >accomplished through the bios settings. Also on the 2 pentiums board I have (60 and 100). I may be wrong but isn't it a 'hardware' selection for the pci burst mode ?
Technical Details
Message-ID:
<4kk91h$iuo@avalon.imaginet.fr>Path:
arc1-ca.pugleaf.net!imaginet.fr!usenetReferences:
<4kh37m$fmd@dodo.global.co.za> <4kh51i$p79@milo.mcs.anl.gov>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!imaginet.fr!usenet From: manu@mail.imaginet.fr (Manu) Newsgroups: comp.lang.asm.x86,comp.lang.c,comp.lang.c++,comp.sys.intel Subject: Re: Using burst mode on PCI bus Date: Fri, 12 Apr 1996 00:47:33 GMT Organization: ImagiNET Message-ID: <4kk91h$iuo@avalon.imaginet.fr> References: <4kh37m$fmd@dodo.global.co.za> <4kh51i$p79@milo.mcs.anl.gov> NNTP-Posting-Host: montpellier71.imaginet.fr X-Newsreader: Forte Free Agent 1.0.82