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Article View: comp.lang.verilog
Article #101

Help with VerilogIn please

#101
From: dan schumacher
Date: Fri, 09 Oct 1992 20:45
30 lines
1293 bytes
I have been trying to use "verilogIn" within
Opus 4.2.  I have run into many problems with this,
and have run out of work around potentials.

The netlist that I am trying to read is fairly large (20K gates),
but not huge.

When running VerilogIn, get the error:
 "File vo.c, Line 91, Function noname *FATAL*failed
     to get the current working directory: 12."
Memory fault(coredump)

I am running on an HP9000/700 with v8.07.

Can anyone suggest the cause of the problem, or a
potential work around.

All that I am really trying to do is get a Verilog gate-level netlist into
Framework II.  I don't need a pretty schematic.

Does anyone know of a verilog netlist reader?

Any assistance would be greatly appreciated.  Thanks in advance.


				 desperately yours,

						Dan Schumacher
						Advanced Systems Division
						Hewllett-Packard
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From: schumach@apollo.HP.COM (dan schumacher)
Subject: Help with VerilogIn please
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Message-ID: <BvvGCI.41E@apollo.hp.com>
Date: Fri, 9 Oct 1992 20:45:54 GMT
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