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Article View: comp.lang.vhdl
Article #322

Re: MCC, VHDL

#322
From: Daniel S. Barclay
Date: Tue, 29 Dec 1992 10:46
41 lines
2638 bytes
mandayrv@ucunix.san.uc.edu (Prince of Wales) writes:
> I am using the MCC compiler/simulator to compile a VHDL file. When I have
> the following line in the source file, the compiler complains that the range
> has to be inside the ANSI C bounds of --2147483647 to +2147483647, which is
> slightly bigger than 1E05. The LRM for VHDL defines that the minimum 
> acceptable limits for any compiler are -1E38 to +1E38. Is there a catch
> somewhere or is it purely a limitation of the MCC system.

1.  You didn't include your following line so I can't see where you tried to
	use a range.  Was it is an integer type definition, a floating-point
	type definition, some other type definition, or somewhere else?

2.  (I assume "--" in "--2147483647" is a typo.  Is that correct, or does it
	mean something I don't recognize?)

3.  (You say that "--2147483647 to +2147483647 [...] is slightly bigger than 
	1E05."  What?  It's a _lot_ bigger than 1E05; it's a little bigger than
	1E09.  Is there a typo here I didn't recognize?)

4.  You say "The LRM for VHDL defines that the minimum acceptable limits for 
	any compiler are -1E38 to +1E38."  That may indicate some confusion.
	There are (at least) two minimums specified in the language:  The VHDL 
	1987 LRM defines that an implementation must support a minimum range 
	of -2147483647 to +2147483647 for an integer type.  It also defines a
	the minimum range of -1.0E38 to +1.0E38 for a floating-point type.
	(Yes, the LRM says 1E38 instead of 1.0E38, but the Interpretations 
	document* says that that is a typo.)

5.  I don't know if the MCC system complies with the standard or not. 
	
* (I think the title is "IEEE Standards Interpretations:  IEEE Std. 1076-1987
IEEE Standard VHDL Language Reference Manual".)

I hope this answers your question.
	
--
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Suite 101, 5457 Twin Knolls Rd.      feeble attempts to improve on the whiny:
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Message-ID: <DANIEL.92Dec29104657@algol.clsi.COM>
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Newsgroups: comp.lang.vhdl
Path: arc1-ca.pugleaf.net!sparky!uunet!clsi!daniel
From: daniel@clsi.COM (Daniel S. Barclay)
Subject: Re: MCC, VHDL
In-Reply-To: mandayrv@ucunix.san.uc.edu's message of Mon, 28 Dec 1992 20:10:40 GMT
Message-ID: <DANIEL.92Dec29104657@algol.clsi.COM>
Sender: usenet@clsi.COM
Organization: CAD Language Systems Inc.
References: <BzzK1s.FFB@ucunix.san.uc.edu>
Date: 29 Dec 92 10:46:57
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