🚀 go-pugleaf

In article <1992Dec17.170431.2520@xilinx.com> philip@xilinx.com (Philip Freidin) writes:
>
>Enter advertising mode:
>
>	One of the facilities of the Xilinx products that differentiates us
>	from all the other lowly wanna-bees is that our XC3000 and XC4000
>	products are full of tri-state buses. These are driven by what we

		etc... etc... blah blah.....  and other self-serving
		stuff about his company's products.

Here is some info on another manufacturer's products:

Concurrent Logic has a product called the CLI6005 (a member of a family
of products, but this is all I have seen data on so far) which has the
following characteristics (Note that I do not work for this company, nor
am I a "happy user" of their products. I am just doing some "truth in
advertising" stuff, and hope my management doesn't catch me :-)  )


The CLI6005 is an array of 7 by 7 big tiles (49 tiles) each madeup of
8 by 8 blocks (64 blocks per tile) for a total of 3136 blocks.

Each block can implement 1 or 2 2-input gates (not an exhaustive list
like the Xilinx products, but an interesting mix of combinations), or
a mux or a flipflop with 1 or 2 gates ( much simpler list of options).
Each block also includes a tristateable buffer, that connects to 
bus lines that span a tile (ie upto 8 tbufs in a row or column within
a tile). Their are facilities for these buses to span more than 1
tile, although some of this seems unidirectional. As their are 49 tiles
with atmost 32 of these tile spanning bus lines, theoretically you
could have 1568 such tbuf lines. Of course such a configuration couldn't
do anything useful. The architecture certainly could support a few
hundred such lines, and have logic and routing available to do useful
stuff.

	Philip Freidin  (408)879-5180


-- 
Philip Freidin: Product Planning Manager, Xilinx, INC
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