Re: What is Synopsys?

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Article #650

#650

From: Asgeir Eiriksson
Date: Mon, 16 Nov 1992 15:34

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In <BxoB76.7x@world.std.com> jcooley@world.std.com (John Cooley) writes:

>From: mohan@tulip.cse.utoledo.edu (Mohan Pakkurti)
>>
>>Can someone tell me what Synopsys stands for ?
>>

I think the name stands for Syn(thesis) of op(timal) Sys(tems) or something
close to that

>  Synopsys is a set of software tools used by chip designers
>  to convert their behavioral models (Verilog or VHDL) into 
                      ^
                      |
                    he meant RTL

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From: asgeir@viking.asd.sgi.com (Asgeir Eiriksson)
Newsgroups: comp.lsi.cad
Subject: Re: What is Synopsys?
Message-ID: <1e8f1oINN118@fido.asd.sgi.com>
Date: 16 Nov 92 15:34:16 GMT
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