🚀 go-pugleaf

I am in the process of implementing a large project composed of
chips (of various types) packaged in packages (various types) and mounted
on PCB.

Since all the chips are designed in-house, and we have full control 
over the process, we are making it in a top-down manner. e.g we start
with a connectivity based placement of the different packages on the PCB, 
and by usage of the connectivity we want to assign chips IO signals to the 
package pins in a optimized way.

I am looking for a program that can do the job. 

	- It has to be good enough to respect Vendor constraints (like 
          input only package pins, pre-assigned tester pins, etc).

	- It must be smart enough to consider the situation when a chip 
	  is used more then once on the board, thus not optimizing 
	  differently in each package...

	- It should be able to take pre-assigned pins, and complete
	  the job by respecting it.

	- It should be able to use a metrics more complex then 
	  the obvious geometric, where different package inputs pins 
	  have different levels of capacitance.


My questions:

1. Does anybody know of any commercial software that can do that job?

2. Could anybody send me any reference to papers or dissertations which 
   attack this problem?

Thanks in advance.

---
Amit Erez
Advanced Computer Research Institute	Phone:	(+33) 72 35 84 59
1, Bld Marius Vivier-Merle		Fax:	(+33) 72 35 84 10
F-69443	LYON CEDEX 03			Email:	amit@acri.fr