Article View: comp.lsi.cad
Article #941Re: Help wanted - Cadence Edge and EDIF
From: David F. Skoll
Date: Thu, 07 May 1992 14:21
Date: Thu, 07 May 1992 14:21
19 lines
1360 bytes
1360 bytes
[I was having problems with 'edifin']: In <1992May7.013138.1152@ee.ubc.ca> carlyw@ee.ubc.ca (Carly Wong) writes: >I suspect those are bugs with edifin/out. Yup! The people who responded to me reported that edifin was "terminally broken." >I got around that by writing a SKILL program to fix the read in layouts, >such as search for "wire" layers, and replace with "dmet". >I could send you the program if you are interested. Thanks, but I did much the same hack. I wrote the pins on regular drawing layers, but attached my own properties to signal that they are really pins. A little SKILL program fixes everything up. -- David F. Skoll
Technical Details
Message-ID:
<dfs.705248500@ro>Path:
arc1-ca.pugleaf.net!sparky!uunet!sun-barr!cs.utexas.edu!utgpu!cunews!dfsReferences:
<dfs.705083429@sarek> <1992May7.013138.1152@ee.ubc.ca>Show Full Headers
Complete Article Headers
X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 109e85,cdd6c03aa35f3392 X-Google-Attributes: gid109e85,public X-Google-Thread: f70d0,cdd6c03aa35f3392 X-Google-Attributes: gidf70d0,public X-Google-ArrivalTime: 1992-05-07 07:21:40 PST Newsgroups: comp.lsi.cad,can.vlsi Path: arc1-ca.pugleaf.net!sparky!uunet!sun-barr!cs.utexas.edu!utgpu!cunews!dfs From: dfs@doe.carleton.ca (David F. Skoll) Subject: Re: Help wanted - Cadence Edge and EDIF Message-ID: <dfs.705248500@ro> Sender: news@cunews.carleton.ca (News Administrator) Organization: Dept. of Electronics, Carleton University References: <dfs.705083429@sarek> <1992May7.013138.1152@ee.ubc.ca> Date: Thu, 7 May 1992 14:21:40 GMT Lines: 20