🚀 go-pugleaf

In article 13968@optilink.COM, manley@optilink.COM (Terry Manley) writes:
> In article <1993Jan19.231338.29821@newsgate.sps.mot.com> saari@chdasic.sps.mot.com writes:
> 
> >IDDQ testing is also necessary for the latent defects and catching faults in
> >redundant logic...
> 
> I'm unfamiliar with the term IDDQ testing. Would someone simply state the
> method of this test and it history?
> 
> Thanks,
> 
> dave
> manley@optilink.com


IDDQ testing refers to the quiescent measurement of drain current in static CMOS
devices (it could also be called ISSQ, since most of the methods I have seen for
measuring recommend the source node...).

Typically, the device is preconditioned into a known state (all nodes off is the 
ideal) and the current at the VSS node is measured with a low ranging PMU (power
supplies are not accurate enough in most cases...). The theory is that if there are
any defective transistors excessive leakage current will be measured.

The problems associated with this process are many:

1) If the device has resistive paths on the inputs (pull ups or pull downs) all of
those nodes need to be accounted for.

2) If the device is very dense it becomes a very complex task to find vectors in the
test pattern that are "ideal" for measurement. Usually, measurements need to made at
many vectors. The algorithm used to determine what vectors to use is usually very
difficult to write.

3) Because it is a static test, all transients require time to settle. In addition,
all bypass capacitance on the test fixtures needs to be removed (accurate PMU's tend
to oscillate with large amounts of capacitance loading them). Add this to item 2, and
test times become very long.

4) Becuase of the test times and fixturing requirements, test costs can go way up.
This may not be a problem in a high volume standard products house, but in an ASIC
environment it can be the difference between P and L...

I am not stating a preference for or against this methodology, just some thoughts.

I believe I stated some of the benefits in my earlier posting.  :-)

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===========================================================
Jonathan Saari                 | The views expressed here
saari@chdasic.sps.mot.com      | are my own...
Test Engineer                  | They are not my employers.
Motorola, Incorporated         | Although they should be...
===========================================================
Glib's Fourth Law of Unreliability:
	Investment in reliability will increase until it exceeds the
	probable cost of errors, or until someone insists on getting
	some useful work done.