Thread View: comp.lsi.testing
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Started by Hai Vo-Ba
Fri, 21 Aug 1992 14:18
Verilog to TEGAS translator
Author: Hai Vo-Ba
Date: Fri, 21 Aug 1992 14:18
Date: Fri, 21 Aug 1992 14:18
11 lines
662 bytes
662 bytes
Hi,
We're looking for a PD netlist translator that can map a hierarchical
structural Verilog netlist into TEGAS. Any pointer is much appreciated.
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Hai Vo-Ba (303)229-3874
ESL MS55 hai@hpeshai.fc.hp.com
Hewlett Packard Co.
3404 E. Harmony Rd.
Fort Collins, Colorado 80525-9599
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