Ring oscillators for characterization?

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2 total messages Started by David C. Black Thu, 03 Sep 1992 11:28

#50

Author: David C. Black
Date: Thu, 03 Sep 1992 11:28

18 lines
1497 bytes

In article <tapas.715497268@femto.engr.mun.ca> tapas@pooh.engr.mun.ca
(Tapas Banerjee) writes:

TAPAS> I was wondering, what kind of problems do you face when you want to
TAPAS> take out couple of tens of MHz freq. out of a chip and what kind of
TAPAS> care is to be taken in measurement of those signals (i.e. the signals
TAPAS> out of chip).

Along a similar line, I am interested in others experience with using
on-chip ring-oscillators to gather characterization data.  Local experiences
suggest these are not very easy to use and perhaps useless.  Does anyone
have data on successes?  We are designing with CMOS .8 - 1 micron gate
arrays and standard cell technologies.
-- 
| David C. Black                  Electrical Engineer                    |
| Tandem Computers Incorporated   Guardian: SMTPGATE@AUSTIN(black@tzone) |
| 14231 Tandem Blvd.              Internet: black@mpd.tandem.com         |
|_Austin, Texas 78728-6699________Phone: (512) 244-8321__________________|

Re: Ring oscillators for characterization?

#51

Author: Mark Johnson
Date: Thu, 03 Sep 1992 16:05

42 lines
2036 bytes

In my experience, ring oscillators are among the BEST
vehicles for process monitoring.  Generally the
most useful ones are a series of _loaded_ oscillators:

   (i)   Oscillator with long thin fingers of N+ diffusion
         loading down every node.  Monitors effect of
         N+ junction perimeter capacitace

   (ii)  Oscillator with fat rectangular boxes of N+
         diffusion loading down every node.  Monitors
         effect of N+ junction perimeter capacitace

   (iii) Oscillator with long meander track of minwidth
         metal-1 loading down every node.  Monitors
         effect of metal-1 capacitance.

   (iv)  Oscillator with a 3-input mux in series between
         each inverting stage.  Monitors effect of
         mux delay (mosfet "R" & "C", junction C).

   (v)   Oscillators made of NAND gates, inverters,
         NOR gates.  Shows effect of PMOS stacks,
         NMOS stacks.

etc.

Admittedly the measurements you get are indirect
indicators of process deviations.  However they are
DIRECT indicatiors of product performance.

The tough part is getting the automatic tester to
do the measurements.  About the best arrangement
I've seen for this was at Vitesse (GaAs vendor).
They do it simply: the oscillators are always
located in the same location in the scribe lane,
so they have dedicated probecard pins for the
oscs.  These go to a GPIB-interfaced frequency
counter.  The frequency counter does the
measurement and presents its result to the tester
over GPIB.  Costs a couple hundred bux.

MJ

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