🚀 go-pugleaf

I have couple questions about MOS circuit design:

	(1) Since Id of a MOSFET can be reduced up to 40% when temperature
	    varies from 25 o C to 125 o C, what are some of the methods to
	    make output impedence of an opamp relatively stable with
	    changing temperature (and/or process variation)?

	(2) Voltage level shifting:
	    The input volatges are 0 to 5 volts (typical CMOS digital
	    signal level). The output voltages are from, say, 2V to 2.8 V.
	    typical noise margin should be allowed by the input voltage.
	    Output voltages needs to be relatively accurate (that is +-
	    0.1 V from 2V and 2.8V). Voltage references of 2V and 2.8V
	    are assumed to be available.

Please post or email suggestions. Thank you very much.

Shih-Lien
sllu@vlsi-cad.isi.edu