Article View: comp.org.ieee
Article #257NEC VR4000 RISC CPU
From: Jamal Haider
Date: Fri, 16 Oct 1992 02:14
Date: Fri, 16 Oct 1992 02:14
64 lines
2882 bytes
2882 bytes
Newsgroups: all
Subject: NEC Vr-4000 RISC seminar
Summary:
Followup-To:
Distribution:
Organization: Netcom - Online Communication Services (408 241-9760 guest)
Keywords:RISC
Let NEC give you the facts about RISC processors. Join us at
the "Vr4000: The Processor for today, tomorrow and beyond" seminar.
Learn why the Vr4000 is and will continue to be the performance
and price leader through the 90's.
NEC Electronics will provide you with the opportunity to learn
why the MIPS R4000 architecture is not only the architecture of choice
for today, but is also the cornerstone for future advances
in microprocessor development. Today, NEC's Vr4000 integrates
a high performance 64 bit CPU with a primary cache and a floating
point unit all on one single die. Versions of the Vr4000 with
secondary cache interface and multiprocessor support are also
available. At our free seminar we'll take you through future
migration paths, discuss packaging trends, pricing and performance,
and provide you with a detailed technical analysis.
4000 RISC-based systems offer a much higher level of
graphical and computational performance compared to X86 systems.
If you design CISC or RISC systems, you can't afford to miss
this seminar. Join us at one of the following locations and learn
why the Vr4000 should be your processor of choice for leading
edge workstations, powerful PC's, multiprocessor and embedded
control systems.
Locations: October 20,1992 LeBaron Hotel San Jose California
October 22,1992 Burlington Marriott, Boston, Massachusetts
November 4, 1992 Red Lion, Costa Mesa, California
Signup: Please call (415)695-6159 or fax 1(800)729-9288
Agenda:
9:00 - 9:15 NEC Company Profile
9:15 - 9:30 MIPS, An Open Architecture
9:30 - 10:00 NEC RISC Products
10:00 - 10:15 MIPS Architecture Review
10:15 - 10:30 Break
10:30 - 11:00 VR4000, The processor of choice for multiple platforms
11:00 - 11:30 VR4000 RISC Architecture
11:30 - 12:00 VR4000 Implementation
12:00 - 1:00 Complimentary Lunch
1:00 - 2:00 VR4000 Implementation
2:00 - 2:30 VR4000 Performance / Competitive Analysis
2:30 - 2:45 Break
2:45 - 3:00 Mips Development Tools
3:00 - 3:45 Third Party Development Tools
3:45 - 4:00 Future of MIPS Architecture
4:00 - 5:00 System Demonstrations
See you at this seminar!!!!!!!!
Technical Details
Message-ID:
<1992Oct16.021405.25786@netcom.com>Path:
arc1-ca.pugleaf.net!sparky!uunet!know!hri.com!noc.near.net!news.Brown.EDU!qt.cs.utexas.edu!cs.utexas.edu!uwm.edu!linac!att!news.cs.indiana.edu!umn.edu!csus.edu!netcom.com!haiderShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!know!hri.com!noc.near.net!news.Brown.EDU!qt.cs.utexas.edu!cs.utexas.edu!uwm.edu!linac!att!news.cs.indiana.edu!umn.edu!csus.edu!netcom.com!haider From: haider@netcom.com (Jamal Haider) Newsgroups: comp.org.ieee,comp.org.uniforum Subject: NEC VR4000 RISC CPU Message-ID: <1992Oct16.021405.25786@netcom.com> Date: 16 Oct 92 02:14:05 GMT Organization: Netcom - Online Communication Services (408 241-9760 guest) Lines: 64