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Article #500Re: Dual Celeron's and SMP Performance Problems
From: Chris Mauritz
Date: Thu, 03 Jun 1999 00:00
Date: Thu, 03 Jun 1999 00:00
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2527 bytes
In comp.os.linux.hardware Totally Lost <idletime@my-deja.com> wrote: > In article <3751F4D8.8C0C9B65@dakotacom.net>, > CB <NocbaisanSpam@dakotacom.net> wrote: > [bulk of extensive interrogation deleted] >> I am perfectly willing to entertain the possibility that some of your > assertions >> may be on the money - but you really didn't offer more than some > general >> theoretical arguments and cautions. Well, I don't have a Linux server > to run >> through the paces, so I'm not much help either... >> >> CB > It seems pointless to respond. I offered some seasoned caution, the > concerns should be explored by anyone that is considering using a > Celeron as a production server, or with other than small footprint > applications. This guy appears both hostile, and doesn't even have > a stake in the outcome. > We are continually offered advise, some must personally experience the > pain before they are convinced of negative outcomes. The Darwin awards > exist for a reason :) The bottom line from my limited experience with dual celerons and substantial experience with dual PPro's and PII/III's is that: * The likely outcome is an increase in performance. * The degree of performance increase is application dependent. * Given "ideal" conditions, it's possible to get a degradation in performance if the application needs the additional L2 cache. * Given those same "ideal" conditions, it may also be a problem to use bona fide PII/PIII's. I'm not sure why some folks are getting all worked up over this. C -- Christopher Mauritz ritz@mordor.net
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From: Chris Mauritz <ritz@newritz.mordor.net>
Subject: Re: Dual Celeron's and SMP Performance Problems
Date: 1999/06/03
Message-ID: <FCrExL.KoI@spcuna.spc.edu>
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References: <7ieko6$41e$1@nnrp1.deja.com> <3751F4D8.8C0C9B65@dakotacom.net> <7j3j2t$m7o$1@nnrp1.deja.com>
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