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Article #507

Re: Dual Celeron's and SMP Performance Problems

#507
From: Chris Mauritz
Date: Wed, 26 May 1999 00:00
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In comp.os.linux.hardware kuhn wrote:
> In comp.os.linux.hardware Totally Lost <idletime@my-dejanews.com> wrote:

> : Celron's with their 128K L2 cache can easily produce worse performance
> : under modest to heavy load than a single processor in an SMP system.

> Don't forget: PPros had only 256K L2 and everbody was just satisfied :-)

And also don't forget that the 128k cache is running at full core
speed rather than 1/2 speed that you'd find on the PII.  I think
for most applications the faster 2 x 128k would be more beneficial
than 2 x 512k running at half the speed of the processor.  I'd love
to see some benchmarks for typical system tasks.

> : In many server systems, even dual PII's with 512K L2 caches fail to
> : scale or produce negative results under modest to heavy work loads.
> : In some applications, even Xenon's large caches fail to scale or
> : produce negative results in comparision to uniprocessors of the same
> : architecture. Simply put, it's not uncommon to find applications where
> : two processors trashing the caches with SMP interrupts or shared memory
> : produce much worse performance than the same system with only a single
> : processor enabled.

I think this is probably a rare occurance and you'd almost have to
specifically design the task to behave this badly.

> Of course, you can _always_ find an appication that doesn't fit
> into an L2-Cache (and that will ever be).

Yup.

> : I would expect that for many users, dual Celeron's may have a negative
> : performance impact much of the time.

No way.

> You _expect_? I have _experiences_: up to 90% speedup at code-compilation
> (yes, with Dual-Celeron)

That's been my experience as well.  

> : To observe that Dual Celron's produce an observed improvement under
> : certain lightly loading applications may be true. To assert that
> : they scale under modest to heavy work loads is probably a huge mistake.

No it isn't.

> It's always a question of code locality: a Dual Celeron may be
> faster than a Dual PII at the same clockrate since the Celeron's
> L2 is twice as fast.

Yup.

> : To expect that they will scale well under Linux with heavy loads is
> : almost certainly folly.

No it isn't.

> hmm ... i tried a load of ten ... the machine didn't felt slow
> at all. :-)

> A friend of mine did some benchmarks with dual PII/350 and
> Dual Celeron 333: the Celerons were only 10-20% slower
> at many Applications (compilation, gaming, rendering etc.)
> but they are a third the price ...

That's the key.  

> You should forget you theoretical considerations (which are close
> to FUD) and do some practical works!
> PII and Celeron are realy very close in performance but very
> different in price (that one who buys a PII instead of a Celeron
> is realy silly or forced to).

For homebuilt systems, I'd agree that it's rather silly not to do
dual celerons unless you have an application that would benefit
enough from the additional (but slower) cache to justify the
substantial increase in cost.

C
-- 
Christopher Mauritz
ritz@mordor.net
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From: Chris Mauritz <ritz@newritz.mordor.net>
Subject: Re: Dual Celeron's and SMP Performance Problems
Date: 1999/05/26
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