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Article #513Re: Dual Celeron's and SMP Performance Problems
From: kuhn
Date: Thu, 27 May 1999 00:00
Date: Thu, 27 May 1999 00:00
30 lines
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2531 bytes
In comp.os.linux.hardware mumford <mumford@netcom.com> wrote: : On a semi-related note, PPro's meant for normal consumption had only : 256K L2 cache. PPro's meant to go in servers could have 512K or 1MB. : These PPro's were *much* more expensive. I think the 1MB'ers were : going for a couple of thousand dollars at one point... *just* the CPU. : I know for a fact that a particular company I worked for (who shall : remain nameless) wanted those larger-cache PPros very much. They : were not satisfied with 256K. Then they had an application were 256K are not enough. You may have an application were 4MB are not enough. But you may also have an application were 32K are enough. It's only a question of code and data locality - at least it only depends on _your_ application. Of course, i'd like to own a Dual Xeon 500 with 2MB each, but for the same price, i get a cluster of ten or more Dual Celeron 400. Depending on the application, the Cluster may be 7 times faster then the Xeons, but they may be only 1/7 the speed as well. -- ------------------------------------------------------------------- | Bernhard Kuhn (kuhn[at]lpr.ei.tum.de) O|||OO||OO| | | Laboratory for Process Control and Real-Time Systems O|||O|O|O|O | | Technische Universit�t M�nchen Tel.+49-89-289-23732 O|||OO||OO| | | 80290 M�nchen, Germany Room 3944 Fax -23555 OOO|O|||O|O | --------------------------------------------------------------------
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From: kuhn@lpr.e-technik.tu-muenchen.de.nospam
Subject: Re: Dual Celeron's and SMP Performance Problems
Date: 1999/05/27
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