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Article #514

Re: Dual Celeron's and SMP Performance Problems

#514
From: Totally Lost
Date: Thu, 27 May 1999 00:00
25 lines
1926 bytes
So what's the point? There are plenty of 8 processor SMP PPro designs,
and some that are 32-64 CC-NUMA (like Sequent's big iron servers).
SMP and NUMA designs were around long before the processor bus and
chipsets supported SMP directly. Big server companies just continue
to do the same thing but with dual/quad clusters of processors over
layered L3 caches and interleaved memory.

In article <374b8777.7216321@24.93.94.39>,
  poit@carolina.rr.calm wrote:
> On Tue, 25 May 1999 16:56:40 GMT, Totally Lost
> <idletime@my-dejanews.com> wrote:
>
> >The work done by Tomohiro Kawada and others has been interesting.
> >I can think of a number of applications where dual/quad overclocked
> >Celeron's can produce very cost effective clusters for number
crunching.
> >The crypt cracking teams will get a great windfall from this work.
>
> Celerons and P2's aren't designed for quad operation...
> PPro/Xeon are
>


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From: Totally Lost <idletime@my-deja.com>
Subject: Re: Dual Celeron's and SMP Performance Problems
Date: 1999/05/27
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