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Article #832

Re: P4 vs Athlon for Linux latexing, is gcc-2.95 responsible?

#832
From: George Macdonald
Date: Tue, 18 Jun 2002 23:00
38 lines
3253 bytes
On 17 Jun 2002 12:10:31 +0200, David Kastrup <David.Kastrup@t-online.de>
wrote:

>fammacd=!SPAM^nothanks@garden.net (George Macdonald) writes:
>
>> On Sun, 16 Jun 2002 09:30:49 GMT, "Robert Myers" <rmyers1400@attbi.com>
>> wrote:
>> 
>> >
>> >Without SSE2, which requires that loops be vectorized, a 1.7GHz P2
>> >is a very weak foating point performer, as many have noted, and as
>> >you have confirmed for yourself.  If I take naive code compiled
>> >with icc, my overclocked Celeron running at 1.5MHz will beat a
>> >1.7GHz P4 every time.
>> 
>> Are you sure about this?  I thought the idea with P4's SSE2 was that
>> for scalar calcs you have addressable registers (no stack) and
>> therefore no need of the FXCH instructions for stack swaps and it
>> runs faster than the old x87 FPU.  I've no experience yet but that's
>> how I read things.
>
>The way "how [you] read things" can be improved upon.

Uhhh... ditto.

>  For an
>example, tell us how you read the first two words of the paragraph
>you quoted above.

I read the first two words in conjunction with the following phrase, which
states that [SSE2] "requires that loops be vectorized".  My point is that
even without vectorization and using the directly addressable registers and
the FPU of SSE2, the performance has been said to be comparable or better
than the x87 FPU of preceding generations of Intel CPUs.

Rgds, George Macdonald

"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
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From: fammacd=!SPAM^nothanks@garden.net (George Macdonald)
Newsgroups: comp.os.linux.hardware,gnu.gcc,comp.sys.ibm.pc.hardware.chips,comp.text.tex
Subject: Re: P4  vs Athlon for Linux latexing, is gcc-2.95 responsible?
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Date: Tue, 18 Jun 2002 23:00:47 GMT