Thread View: comp.sys.acorn.tech
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Started by Steve Loft
Tue, 15 Dec 1992 18:26
ARM3 cache control in RISC OS 3.10
Author: Steve Loft
Date: Tue, 15 Dec 1992 18:26
Date: Tue, 15 Dec 1992 18:26
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831 bytes
831 bytes
Since RISC OS 3.10 has support for the ARM 3, I assume there are some SWI's for controlling the cache? If so, could someone please post (or mail me) the details? Steve -- | Steve Loft steve@klaatu.demon.co.uk | | Doncaster, | | South Yorks. |
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