🚀 go-pugleaf

Summary:


In article <1138@water.waterloo.edu> ljdickey@water.waterloo.edu (Lee Dickey) writes:
| In article <607@sbcs.UUCP> root@sbcs.UUCP (Root) writes:
| >> >      One article I have seen quotes the performance of the slower T414
| >> >      processor (20 mhz) as 10 MIPS !
| >
| >	RISC mips, unfortunately. 
| 
| You seem to imply that RISC mips are not quite as good as some other kind
| of MIPS.  Are RISC mips slower somehow?  Are more instructions needed to
| produce the same results?   Explain, please.

Actually, the term should be "Native MIPS" (Millions of machine
Instructions per Second), as opposed to "Vax MIPS" (How fast is this
machine as compared to a VAX 11/780).  A MIPS number depends greatly upon
processor architecture and benchmarks chosen.

For example, the transputer is a stack machine.  To perform the sequence

	a = b+c;

(assuming a,b, and c are register variables) requires 4 instructions:

	push b
	push c
	add
	pop a

while on the 68000 it requires 2:

	mov b, a
	add c, a

and on many RISC machines it requires only 1:

	add	a, b, c

However, it is generally true that RISC machines require more
instructions to perform an operation than CISC machines (a trade-off for
faster instructions).  For example, the Am29000 runs at around 17
(Native) MIPS sustained, which roughly corresponds to 13 VAX MIPS. 
The correspondance varies with the benchmark -- on different programs,
the same 17 Native MIPS has varied from 10 to 27 VAX MIPS!

	-- Tim Olson
	Advanced Micro Devices
	(tim@amdcad.amd.com)