Article View: comp.sys.dec
Article #391MIPS R3000 architecture description
From: Shubhendu Sekhar Mukherjee
Date: Tue, 14 Apr 1992 20:17
Date: Tue, 14 Apr 1992 20:17
12 lines
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1053 bytes
I work on a DECstation 5000/200 with a MIPS R3000 processor (25 MHz). It has a MIPS R3010 FPU. I am looking for a description of this architecture. Specifically, I am interested in the pipeline and the functional units used. Could anyone help? Is there any ftp site from where I could obtain this information? -Shubu -- ---------------------------------------------------------------------- Shubhendu Sekhar Mukherjee University of Texas @ Austin, C.Sc. e-mail:shubu@cs.utexas.edu [W]:(512) 471-9586 [H]:(512) 467-2653 ----------------------------------------------------------------------
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Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!news From: shubu@cs.utexas.edu (Shubhendu Sekhar Mukherjee) Newsgroups: comp.sys.dec,comp.arch Subject: MIPS R3000 architecture description Followup-To: poster Date: 14 Apr 1992 15:17:20 -0500 Organization: CS Dept, University of Texas at Austin Lines: 12 Message-ID: <kumfegINNq1g@oporto.cs.utexas.edu> NNTP-Posting-Host: oporto.cs.utexas.edu Keywords: MIPS R3000 DEC 5000/200