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Article #698Re: Cache question..
From: Jan Axing
Date: Fri, 26 Jan 1996 00:00
Date: Fri, 26 Jan 1996 00:00
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1161 bytes
Hmm... should have checked. What I said is true for Pentium designs. In a 486 system, 256k caches are dual bank and 512k are single. Dual bank caches can be interleaved to gain performance. Jan
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 1036bc,6ce07d8b414b48e1 X-Google-Attributes: gid1036bc,public X-Google-Thread: 1045b9,6ce07d8b414b48e1 X-Google-Attributes: gid1045b9,public X-Google-Thread: 11196f,6ce07d8b414b48e1 X-Google-Attributes: gid11196f,public X-Google-Thread: 109e38,6ce07d8b414b48e1 X-Google-Attributes: gid109e38,public From: Jan Axing <Jan.Axing.swe3650@oasis.icl.co.uk> Subject: Re: Cache question.. Date: 1996/01/26 Message-ID: <4ebfoa$hdn@radar.pro.icl.se> X-Deja-AN: 136535026 references: <30f80e73.896741@news.innotts.co.uk> <4d9toe$99q@brickbat.mindspring.com> <4dbae0$j4a@canton.charm.net> <4dm3su$3cl@nyheter.chalmers.se> <4ebaaa$hdn@radar.pro.icl.se> content-type: text/plain; charset=us-ascii organization: ICL mime-version: 1.0 newsgroups: comp.sys.ibm.pc.hardware.chips,comp.sys.ibm.pc.hardware.misc,comp.sys.ibm.pc.hardware.systems,demon.tech.pc x-mailer: Mozilla 1.22 (Windows; I; 16bit)