Article View: comp.sys.ibm.pc.hardware.chips
Article #699Re: Cache question..
From: Gary Williamson
Date: Fri, 26 Jan 1996 00:00
Date: Fri, 26 Jan 1996 00:00
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1881 bytes
In article <4e1851$kts@brickbat.mindspring.com>, wluther@mindspring.com (J. Wade Luther) writes:
:OK, when you have 256 K of cache you have 8 32K SRAM chips(8*32=256)
:in 2 banks, with each bank having 4 chips...when you have 512K you
:have 4 128K SRAM chips(4*128=512) in one bank...the access to the
:motherboard is faster for the 256K configuration because the
:motherboard can do bank interleaving...it can't do this with the 512K
:configuration because all the SRAM is in one bank...the end result is
:that 512K, which costs a lot more, offers only a slight increase in
:performance
:
Not necessarily. You can also use 8 64K SRAM chips to get
512K and interleaving. Been there. Done that.
--
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Gary Williamson
wwilliam@polaris.orl.mmc.com
Orlando, Florida
Most of the time I know what I'm talking about.
It's up to the reader to determine whether a shovel is needed.
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 1036bc,6ce07d8b414b48e1 X-Google-Attributes: gid1036bc,public X-Google-Thread: 109e38,6ce07d8b414b48e1 X-Google-Attributes: gid109e38,public X-Google-Thread: 1045b9,6ce07d8b414b48e1 X-Google-Attributes: gid1045b9,public X-Google-Thread: 11196f,6ce07d8b414b48e1 X-Google-Attributes: gid11196f,public From: wwilliam@polaris.orl.mmc.com (Gary Williamson) Subject: Re: Cache question.. Date: 1996/01/26 Message-ID: <4ebdje$pmn@theopolis.orl.mmc.com> X-Deja-AN: 137053141 references: <4e1851$kts@brickbat.mindspring.com> organization: Lockheed Martin - Orlando reply-to: wwilliam@polaris.orl.mmc.com newsgroups: comp.sys.ibm.pc.hardware.chips,comp.sys.ibm.pc.hardware.misc,comp.sys.ibm.pc.hardware.systems,demon.tech.pc