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Article #1121

#1121

From: John F Carr
Date: Mon, 21 Dec 1992 20:52

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An 80?86 disables interrupts for the instruction following a load of the SS
register, to allow for the stack pointer to be loaded.  What happens if the
following instruction faults?  Even if it doesn't reference memory, there
could be an instruction page fault.

--
    John Carr (jfc@athena.mit.edu)

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Newsgroups: comp.sys.intel
Path: arc1-ca.pugleaf.net!sparky!uunet!enterpoop.mit.edu!bloom-picayune.mit.edu!athena.mit.edu!jfc
From: jfc@athena.mit.edu (John F Carr)
Subject: Loading SS
Message-ID: <1992Dec21.205245.13080@athena.mit.edu>
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Organization: Massachusetts Institute of Technology
Date: Mon, 21 Dec 1992 20:52:45 GMT
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