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Article #1431Re: 960 XA/MX Questions
From: Dennis O'Connor
Date: Fri, 08 Jan 1993 23:48
Date: Fri, 08 Jan 1993 23:48
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A very brief summary of the current i960(R) processor family : Commercial: SA : core architecture, 16-bit multiplexed bus SB : SA plus on-chip FPU KA : core architecture, 32-bit multiplexed bus KB : KA plas on-chip FPU CA : superscalar, core architecture, 32-bit demuxed bus, dma CF : CA with bigger I-Cache and a data cache Military: MC : core + FPU + MMU, mil-spec XA : MC + object-oriented tagged architecture, mil-spec MM : superscalar, core + FPU + MMU, back-side cache, mil-spec MX : MM + object-oriented tagged architecture, mil-spec Note that none of the commercial parts are the same die as any of the military parts : that would cost too much. Also, the MM/MX is _not_ hexagonal. It's basicly rectangular. It is one of the larger chips made by Intel. -- Dennis O'Connor doconnor@sedona.intel.com
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Path: arc1-ca.pugleaf.net!sparky!uunet!wupost!cs.utexas.edu!asuvax!chnews!chnews!doconnor From: doconnor@sedona.intel.com (Dennis O'Connor) Newsgroups: comp.sys.intel Subject: Re: 960 XA/MX Questions Date: 8 Jan 93 23:48:04 Organization: Intel i960(tm) Architecture Lines: 25 Message-ID: <DOCONNOR.93Jan8234804@potato.sedona.intel.com> References: <1993Jan6.023733.5129@netcom.com> <MKAHN.93Jan7074846@hopi.sedona.intel.com> <1993Jan8.053615.22689@labtam.labtam.oz.au> <1993Jan08.173711.14431@donau.et.tudelft.nl> <1993Jan8.215944.10065@gandalf.ca> NNTP-Posting-Host: potato.intel.com In-reply-to: dcarr@gandalf.ca's message of Fri, 8 Jan 1993 21:59:44 GMT