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Article #2249Re: Triton II caching support
From: Mark Hahn
Date: Thu, 30 May 1996 00:00
Date: Thu, 30 May 1996 00:00
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> Does anyone know if the Triton II chip sets (430HX PCIset and 430VX > chip set) cache more than the "Lower 64MB" of memory, which is what the > Triton (430FX PCIset) caches. 430hx supports 11 bits of tag cache, and that's not counting status, which it implements internally. the top three bits are described as optional (and are omitted from the 430vx.) since you can get 512k cache for a pittance these days, they both support 128M cachable range. I don't see specs at this level of detail for the 430fx, but I suspect it also implements 8 bits, providing 128M cachable with 512k cache. regards, mark hahn. -- operator may differ from spokesperson. hahn@neurocog.lrdc.pitt.edu http://neurocog.lrdc.pitt.edu/~hahn/
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 10c6a1,9113ef086746e179 X-Google-Attributes: gid10c6a1,public X-Google-Thread: 1036bc,9113ef086746e179 X-Google-Attributes: gid1036bc,public X-Google-Thread: 110292,9113ef086746e179 X-Google-Attributes: gid110292,public From: hahn@neurocog.lrdc.pitt.edu (Mark Hahn) Subject: Re: Triton II caching support Date: 1996/05/30 Message-ID: <4oj93g$nsj@usenet.srv.cis.pitt.edu> X-Deja-AN: 157477908 references: <833406694snz@longley.demon.co.uk> <Fec$yRApWNrxEw1D@mwb.u-net.com> <4oipbn$8pi@dfw-ixnews9.ix.netcom.com> organization: Learning Research and Development Center at U. of Pittsburgh followup-to: comp.sys.intel,comp.periphs,demon.tech.pc newsgroups: comp.sys.intel,comp.periphs,demon.tech.pc