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Article #505

Info sought about i860

#505
From: Jean-Laurent Philippe
Date: Fri, 21 Aug 1992 09:05
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Jean-Laurent PHILIPPE
------
Could someone tell me his experience about the i860's difficulties
(or surprises) when a trap handler tries to determine where to resume
execution after a trap occurred.
(delayed branch instructions, autoincrement load/store instruction,
dual mode, IEEE standard, ...).

Christophe Thiblot	thiblot@archipel.fr
Dr. Jean-Laurent PHILIPPE         Tel: (33) 72-72-84-70
LIP - ENS Lyon                    Fax: (33) 72-72-80-80
46, Allee d'Italie
69364 Lyon Cedex 07               E-mail : philippe@frensl61.bitnet
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Path: arc1-ca.pugleaf.net!sparky!uunet!mcsun!corton!babbage!ensl!news
From: philippe@ens.ens-lyon.fr (Jean-Laurent Philippe)
Newsgroups: comp.sys.intel
Subject: Info sought about i860
Message-ID: <BtBt9x.5J9@ens-lyon.fr>
Date: 21 Aug 92 09:05:57 GMT
Sender: news@ens-lyon.fr
Organization: Ecole Normale Superieure de Lyon, France
Lines: 15