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Article View: comp.sys.intel
Article #554

Intel 486 on-chip cache in a multiprocessor config ?

#554
From: Al Dykes
Date: Mon, 31 Aug 1992 17:07
6 lines
440 bytes
Can the 486  on-chip cache maintain cache coherency in 
a shared memory MP configuration ? 

Al Dykes
---------
adykes@jpr.com
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Message-ID: <1992Aug31.170710.7898@jpradley.jpr.com>
Path: arc1-ca.pugleaf.net!sparky!uunet!murphy!jpradley!adykes

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Newsgroups: comp.sys.intel
Path: arc1-ca.pugleaf.net!sparky!uunet!murphy!jpradley!adykes
From: adykes@jpradley.jpr.com (Al Dykes)
Subject: Intel 486 on-chip cache in a multiprocessor config ?
Organization: Unix in NYC
Date: Mon, 31 Aug 1992 17:07:10 GMT
Message-ID: <1992Aug31.170710.7898@jpradley.jpr.com>
Lines: 10