🚀 go-pugleaf

In article <577@studsys.mu.edu> stevej@studsys.mu.edu (jovanovic) writes:
>impede design progress, don't you.  Steve Jobs has got it right.  25MHz
>processor, 25MHz NuBus.

Let's settle this once and for all the NextBus is a 12.5MHz NuBus that
bursts two words/cycle - this means that (for a 68k family motherboard)
you have to have your graphics engine at least partly on the motherboard
in order to generate write bursts (68030 chips only generate burst reads),
also many graphics ops involve read-modify-write cycles which NuBus doesn't
burst at all, you would have to burst in a chunk RMW them then burst them
out when you are done which means you can't overlap memory ops with graphics
ALU ops. If you can't burst then you are stuck with a minimum of 2 12.5MHz
cycles per video access (or 160nS - about the right amount for DRAM cycle
time anyway).

Apart from this misconception (not helped by Next's marketting :-) the NextBus
is really a great piece of work, it is not terminated, except by the source
driving impedance (ie it bounces exactly once and then is absorbed back where
it came from within an easily determined time which can be taken into
account and ignored due to having a synchronous and fixed length bus) this
really saves on power and lets you drive the bus with CMOS right out of your
gate-array rather than through expensive power-hungry drivers. Clock
distribution is different of course (it has to be very clean) and there are
(25MHz and 12.5MHz) two of them letting one do a faster state machine on a
card without having to fall all over the place recovering 20MHz from 10MHz
etc With my software hat on I like the fact that every card has an single
known location in which to check for a pending interrupt and to clear it.

	Paul



-- 
Paul Campbell    UUCP: ..!mtxinu!taniwha!paul     AppleLink: D3213
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