🚀 go-pugleaf

In aus.computers.sun Mark Mentovai <news@mentovai.com> wrote:
: James Lockwood wrote:
:>Craig Dewick (cd@lios.apana.org.au) wrote:
:>: It depends on the CPU(s) fitted to the 10. The 170 MHz Sparc 5 has a 
:>: single,
:>: 170 Mhz Microsparc-2 processor. The Microsparc CPU family was the
:>: predecessor to the SuperSparc (up to SM-61), Supersparc-2 (SM-71 and 
:>: SM-81)
:>: and Hypersparc processor(s) most commonly used in Sparc 10's, 20, 
:>: 4/6x0's,
:>: etc.
:>
:>Actually, microSparc (as used in the Classic/LX) and microSparc-II (used
:>in the Sparc 4/5) were developed concurrently with SuperSparc.  SuperSparc
:>was released first (in 1992), microSparc-II didn't even arrive until 1994.
:>The two processors are very different architecturally, SuperSparc
:>accomplishes more work per clock cycle but was harder to scale up in clock
:>speed.  The SM20 and SM30 existed solely because TI was having trouble
:>manufacturing 40MHz SuperSparcs in quantity.

: Also, the 5/170 wasn't a microSPARC but a TurboSPARC, which performs 
: better (cycle-for-cycle and overall) than microSPARCs.

: There's a bug that allows any user to hang a TurboSPARC machine, 
: requiring a toggle of the power switch to restore it.  If you are 
: planning an environment in which the machine may be executing arbitrary 
: unpriviliged code, I would advise against a TurboSPARC.

Also, the TurboSPARC has a small 2nd level cache of some description,
whereas the others (70/85/110) don't.

Darren