🚀 go-pugleaf

>The transputer samples MemWait close to the last falling edge of ProcClockOut
>*before* the end of T4. notMemS3 goes low at exactly this point for the AD7
>configuration, and is thus not a sensible strobe to use. Section 8.12 of the
>T800 engineering data states that whatever strobe you use, "its delay
>should be such as to take the [MemWait] strobe low an even number of
>periods Tm after the start of T1, to coincide with a rising edge of
>ProcClockOut".

As you point out, MEMWAIT is active high, not active low. That was a
slip of the memory. I do indeed generate active high on MEMWAIT. I agree
about tieing MEMWAIT to MS3, but tieing it to MS4 didn't work, so...

Basically, I have MEMWAIT set up so that, during an I/O cycle, it goes high
with MS3 and stays high for at least 60ns - if the I/O processor requests a
longer delay, MEMWAIT is stretched as far as necessary; the idea was that
MEMWAIT could only go low after 60ns + whatever-was-necessary; since
MEMWAIT is sampled near falling edges of ProcClockOut, that should
introduce at least one wait state in the cycle. But, no dice.

So, the timing should look something like this:

Tstate:           T1 T1 T2 T2 T3 T3 T4 T5 T5 T5 T5 T6 T6
P.C.Out:        _|--|__|--|__|--|__|--|__|--|__|--|__|--|_
MS0:            -------|__________________________|-------
MS3:            ----------------|_________________|-------
WAIT:           ________________|-------XXXXXXX|__________

Notice that MEMWAIT is high during at least one falling edge of P.C.Out,
but gets pushed to the right as necessary. The T800 seems to ignore it
totally; regardless of how far MEMWAIT stretches, MS0 is always the same
length.

Any ideas?

Andrew
--------------------
Andrew Stewart, Interactive Systems Design Group, University of Hull, Hull, UK
ARPA:   andrew%hu-isd.uucp@ukc.ac.uk OR andrew@cs.hull.ac.uk