Article View: comp.sys.transputer
Article #263i960
From: Moshe Braner
Date: Wed, 13 Sep 1989 17:03
Date: Wed, 13 Sep 1989 17:03
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Any info on the difference between the i860 and the new i960? Actually, the T800 can work on two instructions at once, as long as the first is an FPU op and the second is not and is not dependent on the result of the first. That is a rather strong point for matrix calculations. I presume that the i960 is much further advanced on that line. Does it have, in a sense, two copies of the instruction-execution hardware parts to allow overlapping any two independent instructions? That would be parallelism at a new level. In the future I presume we'll have CPUs that do 4 ops at once, 8, 16.. :-) Anyway, what is coming out from Inmos these days as a response? - Moshe Braner
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arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!TPOT.TN.CORNELL.EDU!branerShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!TPOT.TN.CORNELL.EDU!braner From: braner@TPOT.TN.CORNELL.EDU (Moshe Braner) Newsgroups: comp.sys.transputer Subject: i960 Message-ID: <8909131703.AA02912@tpot.tn.cornell.edu> Date: 13 Sep 89 17:03:54 GMT Sender: daemon@ucbvax.BERKELEY.EDU Organization: The Internet Lines: 12