i960

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2 total messages Started by Moshe Braner Wed, 13 Sep 1989 17:03

#263

Author: Moshe Braner
Date: Wed, 13 Sep 1989 17:03

12 lines
1064 bytes

Any info on the difference between the i860 and the new i960?
Actually, the T800 can work on two instructions at once, as long
as the first is an FPU op and the second is not and is not
dependent on the result of the first.  That is a rather strong
point for matrix calculations.  I presume that the i960 is much
further advanced on that line.  Does it have, in a sense, two
copies of the instruction-execution hardware parts to allow
overlapping any two independent instructions?  That would be
parallelism at a new level.  In the future I presume we'll have
CPUs that do 4 ops at once, 8, 16.. :-)
Anyway, what is coming out from Inmos these days as a response?
- Moshe Braner

Parallelism of T800 (was Re: i960)

#266

Author: Jan Vorbrueggen
Date: Wed, 13 Sep 1989 22:15

17 lines
1164 bytes

As I count it, the T800 has a (possible) total of 15 parallel
activities:

- execute 'normal' instructions        (1)
- execute FPU instructions             (1)
- do input  on 4 links                 (4)
- do output on 4 links                 (4)
- wait for event input                 (1)
- wait for timer expiration (high/low) (2)
- wait for time-slice to expire        (1)
- do transfers from/to memory          (1)

From a programmer's point of view, you can certainly have the first
four activities in the list as nine seperate processes actually doing
something (i.e., modifying the contents of memory).

Jan Vorbrueggen

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