🚀 go-pugleaf

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*      Edinburgh Parallel Computing Centre Lunch Time Seminar          *
*    King's Buildings, James Clerk Maxwell Building, Room 6301.        *
*                   Tuesday 29th August 2000, 3pm.                     *
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*                                                                      *
*  The Monash Multiprocessor, its Password-Capability System, and its  *
*            Evolution into a Massively Parallel System                *
*                                                                      *
*                        Dr Ronald Pose,                               *
*          School of Computer Science & Software Engineering,          *
*                       Monash University,                             *
*                         Melbourne,                                   *
*                         Australia.                                   *
*                                                                      *
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Abstract:

A capability-based, tightly-coupled multiprocessor computer system has
been designed and constructed in the Department of Computer Science at
Monash University. One of the key requirements of the system was to be
able to facilitate the easy and secure sharing of information. To that
end a novel global, persistent virtual memory was defined based on the
concept of capabilities. Special addressing hardware was developed in
order to support this secure persistent virtual memory. The address
translation was split between the processors and the memory modules
giving certain advantages over conventional address translation schemes
in the context of distributing the system on a multiprocessor, and in
fact over networks of multiprocessors.

A novel form of capability-based operating system was designed and
implemented on the Monash Multiprocessor. This Password-Capability
System introduced a new form of Capability which was neither tagged in
the hardware nor segregated in specially protected memory, as had been
the case with earlier capability-based systems. The
Password-Capability System had properties which made some conventional
approaches to problems inappropriate. In particular a novel approach
to garbage collection was employed which led to a more general view of
resource allocation and control.

The Password-Capability idea was later taken up in other operating
systems projects such as Opal at University of Washington and Mungi at
University of NSW.

The Monash Multiprocessor was reasonably ambitious for a low budget
university project of the 1980s. It does suffer in comparison with the
performance of modern RISC based systems. Various schemes were devised
to produce higher performance multiprocessor systems which would still
run operating systems based on the Password-Capability model. A novel
highly scalable multiprocessor interconnection topology was devised
which could allow systems involving thousands of fast processors to be
interconnected and share memory.

In this talk I will describe the context in which the Monash
Multiprocessor and its Password-Capability System were devised. The
principles behind the Password-Capability System will be explained, and
its realization using the novel address translation mechanisms of the
Monash Multiprocessor will be described. The Monash Multiprocessor and
the Password-Capability system were designed together, and it is
interesting how the same philosophical approach permeates both the
hardware and software aspects of the system.

I will give an outline of an evolution of our original multiprocessor
bus design into a higher performance design using a pair of
uni-directional buses. While that could cope with a moderate number of
first generation RISC microprocessors, it became evident that this
approach would not scale into a large scale system with hundreds or
thousands of processors and gigabytes of shared memory.

A novel, highly scalable multiprocessor interconnection network was
devised. It uses lots of small bus segments and has the
processor-memory modules act as the switches linking them. This system
is not only scalable but also has the desirable commercial engineering
property of only having a single kind of active module. In fact a
passive backplane is used as the interconnect. An unusual
interconnection topology was devised and the use of a centralized clock
was avoided. In fact different parts of the system could run at
different speeds, thus allowing for newer, faster modules to be added
without having to remove older, slower modules.

The system presents a shared memory albeit with non-uniform access
times to its contents. A single-address space operating system such as
the Password-Capability System or Walnut could easily be supported.

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More details about past and coming seminars can be obtained from:

	http://www.epcc.ed.ac.uk/epcc-tec/seminars/

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|Mario Antonioletti:EPCC,JCMB,The King's Buildings,Edinburgh EH9 3JZ.  |
|Tel:0131 650 5026:mario@epcc.ed.ac.uk:http://www.epcc.ed.ac.uk/~mario/|
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